diff options
| author | Ben Gardner <gardner.ben@gmail.com> | 2015-12-08 21:20:25 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-12-16 01:10:06 +0100 |
| commit | fa6014a6ec8253de8c86b0180221856a1398e70b (patch) | |
| tree | 55d71de574980b69930abed6bf3733050e6b69ac /src/soc/intel/fsp_baytrail/baytrail/device_nvs.h | |
| parent | 1e1c7ac3b4cb6d85eb602e04b0e4da8c042846c0 (diff) | |
| download | coreboot-fa6014a6ec8253de8c86b0180221856a1398e70b.tar.xz | |
intel/fsp_baytrail: rename include folder baytrail to include/soc
This is to match the layout of the non-fsp baytrail to make comparisons
easier and possibly remove duplicate files.
Change-Id: I9a94842d724ab3826de711d398227e7bdc1045ff
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: https://review.coreboot.org/12686
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/baytrail/device_nvs.h')
| -rw-r--r-- | src/soc/intel/fsp_baytrail/baytrail/device_nvs.h | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/src/soc/intel/fsp_baytrail/baytrail/device_nvs.h b/src/soc/intel/fsp_baytrail/baytrail/device_nvs.h deleted file mode 100644 index 5c4e49bb80..0000000000 --- a/src/soc/intel/fsp_baytrail/baytrail/device_nvs.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _BAYTRAIL_DEVICE_NVS_H_ -#define _BAYTRAIL_DEVICE_NVS_H_ - -#include <stdint.h> - -/* Offset in Global NVS where this structure lives */ -#define DEVICE_NVS_OFFSET 0x1000 - -#define LPSS_NVS_SIO_DMA1 0 -#define LPSS_NVS_I2C1 1 -#define LPSS_NVS_I2C2 2 -#define LPSS_NVS_I2C3 3 -#define LPSS_NVS_I2C4 4 -#define LPSS_NVS_I2C5 5 -#define LPSS_NVS_I2C6 6 -#define LPSS_NVS_I2C7 7 -#define LPSS_NVS_SIO_DMA2 8 -#define LPSS_NVS_SPI 9 -#define LPSS_NVS_PWM1 10 -#define LPSS_NVS_PWM2 11 -#define LPSS_NVS_HSUART1 12 -#define LPSS_NVS_HSUART2 13 - -#define SCC_NVS_MMC 0 -#define SCC_NVS_SDIO 1 -#define SCC_NVS_SD 2 - -typedef struct { - /* Device Enabled in ACPI Mode */ - u8 lpss_en[14]; - u8 scc_en[3]; - u8 lpe_en; - - /* BAR 0 */ - u32 lpss_bar0[14]; - u32 scc_bar0[3]; - u32 lpe_bar0; - - /* BAR 1 */ - u32 lpss_bar1[14]; - u32 scc_bar1[3]; - u32 lpe_bar1; - - /* Extra */ - u32 lpe_fw; /* LPE Firmware */ - u8 rsvd1[3930]; /* Add padding so sizeof(device_nvs_t) == 0x1000 */ -} __attribute__((packed)) device_nvs_t; - -#endif |