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author | hcl-coreboot <Coreboot@hcl.com> | 2019-08-06 15:40:23 +0530 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-08 02:26:51 +0000 |
commit | 0ecdf3e5361414bd345f414e922b57ffdd60e898 (patch) | |
tree | 86a208c6365f44afa5b13989e5fe8939d9348e60 /src/soc/intel/fsp_baytrail/fsp/Makefile.inc | |
parent | f795242f26887e08162b77c5ca2967f6ffcfee02 (diff) | |
download | coreboot-0ecdf3e5361414bd345f414e922b57ffdd60e898.tar.xz |
fsp_baytrail/fsp_broadwell_de: Sort entries in Makefile.inc
Change-Id: I12e6ec4aec7dcadcbb886c3fc4c3b9126a0a835c
Signed-off-by: Sourabh Kashyap <sourabhka@hcl.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34744
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail/fsp/Makefile.inc')
-rw-r--r-- | src/soc/intel/fsp_baytrail/fsp/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_baytrail/fsp/Makefile.inc b/src/soc/intel/fsp_baytrail/fsp/Makefile.inc index 09c5bc506d..024dd70855 100644 --- a/src/soc/intel/fsp_baytrail/fsp/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/fsp/Makefile.inc @@ -13,5 +13,5 @@ # GNU General Public License for more details. # -ramstage-y += chipset_fsp_util.c romstage-y += chipset_fsp_util.c +ramstage-y += chipset_fsp_util.c |