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authorMarc Jones <marc.jones@se-eng.com>2015-04-22 23:16:31 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-24 00:37:37 +0200
commit786879777a70cb82c94588e6d14c8fdd18ab4345 (patch)
treea3dea1ee11739a00b63ffead17d7cd29078a70b8 /src/soc/intel/fsp_baytrail
parentbe34797e4c2a5b74bb8fcbbe9e4301b471d185e5 (diff)
downloadcoreboot-786879777a70cb82c94588e6d14c8fdd18ab4345.tar.xz
fsp: Move fsp to fsp1_0
Prepare for FSP 1.1 integration by moving the FSP to a FSP 1.0 specific directory. See follow-on patches for sharing of common code. Change-Id: Ic58cb4074c65b91d119909132a012876d7ee7b74 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/9970 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/fsp_baytrail')
-rw-r--r--src/soc/intel/fsp_baytrail/baytrail/romstage.h2
-rw-r--r--src/soc/intel/fsp_baytrail/chip.c2
-rw-r--r--src/soc/intel/fsp_baytrail/chip.h2
-rw-r--r--src/soc/intel/fsp_baytrail/fsp/Kconfig2
-rw-r--r--src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c2
-rw-r--r--src/soc/intel/fsp_baytrail/memmap.c2
-rw-r--r--src/soc/intel/fsp_baytrail/northcluster.c2
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c2
8 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/fsp_baytrail/baytrail/romstage.h b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
index a800600626..1f421df3fd 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/romstage.h
+++ b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
@@ -29,7 +29,7 @@ void report_platform_info(void);
#include <stdint.h>
#include <arch/cpu.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
void main(FSP_INFO_HEADER *fsp_info_header);
void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
diff --git a/src/soc/intel/fsp_baytrail/chip.c b/src/soc/intel/fsp_baytrail/chip.c
index 732d1dcd1e..d26b64aa96 100644
--- a/src/soc/intel/fsp_baytrail/chip.c
+++ b/src/soc/intel/fsp_baytrail/chip.c
@@ -22,7 +22,7 @@
#include <device/pci.h>
#include <baytrail/pci_devs.h>
#include <baytrail/ramstage.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include "chip.h"
static void pci_domain_set_resources(device_t dev)
diff --git a/src/soc/intel/fsp_baytrail/chip.h b/src/soc/intel/fsp_baytrail/chip.h
index 6e83ef236f..9a2edfeb33 100644
--- a/src/soc/intel/fsp_baytrail/chip.h
+++ b/src/soc/intel/fsp_baytrail/chip.h
@@ -23,7 +23,7 @@
#define _FSP_BAYTRAIL_CHIP_H_
#include <arch/acpi.h>
-#include <drivers/intel/fsp/fsp_values.h>
+#include <drivers/intel/fsp1_0/fsp_values.h>
/* The devicetree parser expects chip.h to reside directly in the path
* specified by the devicetree. */
diff --git a/src/soc/intel/fsp_baytrail/fsp/Kconfig b/src/soc/intel/fsp_baytrail/fsp/Kconfig
index cbe3a95ff0..252c41f50d 100644
--- a/src/soc/intel/fsp_baytrail/fsp/Kconfig
+++ b/src/soc/intel/fsp_baytrail/fsp/Kconfig
@@ -19,7 +19,7 @@
config BAYTRAIL_FSP_SPECIFIC_OPTIONS
def_bool y
- select PLATFORM_USES_FSP
+ select PLATFORM_USES_FSP1_0
select USE_GENERIC_FSP_CAR_INC
select FSP_USES_UPD
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index b8c1bf6caa..eb068bab36 100644
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -26,7 +26,7 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <baytrail/pci_devs.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include "../chip.h"
#include <arch/io.h>
#include <baytrail/reset.h>
diff --git a/src/soc/intel/fsp_baytrail/memmap.c b/src/soc/intel/fsp_baytrail/memmap.c
index 480bbeba62..5f31430914 100644
--- a/src/soc/intel/fsp_baytrail/memmap.c
+++ b/src/soc/intel/fsp_baytrail/memmap.c
@@ -22,7 +22,7 @@
#include <cbmem.h>
#include <baytrail/iosf.h>
#include <baytrail/smm.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
uintptr_t smm_region_start(void)
{
diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c
index b288388db2..2238a8abe3 100644
--- a/src/soc/intel/fsp_baytrail/northcluster.c
+++ b/src/soc/intel/fsp_baytrail/northcluster.c
@@ -31,7 +31,7 @@
#include <device/pci.h>
#include <cbmem.h>
#include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
static const int legacy_hole_base_k = 0xa0000 / 1024;
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 81a02795ab..3c4098f8fd 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -37,7 +37,7 @@
#include <baytrail/romstage.h>
#include <baytrail/acpi.h>
#include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include <baytrail/pmc.h>
#include <baytrail/spi.h>
#include <version.h>