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| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-04 18:06:36 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-05 21:40:12 +0100 |
| commit | e10108a6691c804f4b917be9a25bc8af3d7cc6a1 (patch) | |
| tree | 80c07347eb12374db8877b4ed3b157a6190b37cf /src/soc/intel/fsp_baytrail | |
| parent | db3e2f0931a52bee6e59d09df572fd0bfb481ff9 (diff) | |
| download | coreboot-e10108a6691c804f4b917be9a25bc8af3d7cc6a1.tar.xz | |
FSP platform microcode: Update to remove Kconfig variable
Move the Kconfig variable into a .h file - this does not need to be
in Kconfig.
Change-Id: I1db20790ddb32e0eb082503c6c60cbbefa818bb9
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7646
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail')
4 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index e9391c302b..85b3d3255b 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -102,12 +102,6 @@ config CPU_MICROCODE_CBFS_LOC hex default 0xfff10040 -config CPU_MICROCODE_CBFS_LEN - hex - default 0x19800 - help - This should be updated when the microcode patch changes. - config CBFS_SIZE hex default 0x200000 diff --git a/src/soc/intel/fsp_baytrail/microcode/Makefile.inc b/src/soc/intel/fsp_baytrail/microcode/Makefile.inc index f6ee1356bf..0082313b2e 100644 --- a/src/soc/intel/fsp_baytrail/microcode/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/microcode/Makefile.inc @@ -17,6 +17,7 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c +CPPFLAGS_romstage += -I$(src)/soc/intel/fsp_baytrail/microcode ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),) ifneq ($(wildcard $(shell readlink -f "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),) diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c index 43cbf003ab..51b6c19f82 100644 --- a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c +++ b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c @@ -19,7 +19,7 @@ unsigned microcode[] = { -/* Size is 0x19800 - update in Kconfig when the patch gets updated. */ +/* Size is 0x19800 - update in microcode_size.h when a patch gets changed. */ #include "M0230672228.h" // M0230672: Baytrail "Super SKU" B0/B1 #include "M013067331E.h" // M0130673: Baytrail I B2 / B3 diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_size.h b/src/soc/intel/fsp_baytrail/microcode/microcode_size.h new file mode 100644 index 0000000000..df6082deb0 --- /dev/null +++ b/src/soc/intel/fsp_baytrail/microcode/microcode_size.h @@ -0,0 +1,2 @@ +/* Maximum size of the area that the FSP will search for the correct microcode */ +#define MICROCODE_REGION_LENGTH 0x19800 |