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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-22 02:18:00 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 01:17:54 +0000
commitc70eed1e6202c928803f3e7f79161cd247a62b23 (patch)
treee46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/soc/intel/fsp_baytrail
parent54efaae701dacd58621e66a8cf56812eb5304946 (diff)
downloadcoreboot-c70eed1e6202c928803f3e7f79161cd247a62b23.tar.xz
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/fsp_baytrail')
-rw-r--r--src/soc/intel/fsp_baytrail/i2c.c6
-rw-r--r--src/soc/intel/fsp_baytrail/northcluster.c2
-rw-r--r--src/soc/intel/fsp_baytrail/pmutil.c2
-rw-r--r--src/soc/intel/fsp_baytrail/ramstage.c2
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c6
5 files changed, 8 insertions, 10 deletions
diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c
index 95761f3d19..22e565fd46 100644
--- a/src/soc/intel/fsp_baytrail/i2c.c
+++ b/src/soc/intel/fsp_baytrail/i2c.c
@@ -114,7 +114,7 @@ int i2c_init(unsigned bus)
base_ptr = (char*)base_adr[bus];
/* Set the I2C-device the user wants to use */
- dev = dev_find_slot(0, PCI_DEVFN(I2C1_DEV, bus + 1));
+ dev = pcidev_on_root(I2C1_DEV, bus + 1);
/* Ensure we have the right PCI device */
if ((pci_read_config16(dev, 0x0) != I2C_PCI_VENDOR_ID) ||
@@ -171,7 +171,7 @@ int i2c_read(unsigned bus, unsigned chip, unsigned addr,
int stat;
/* Get base address of desired I2C-controller */
- dev = dev_find_slot(0, PCI_DEVFN(I2C1_DEV, bus + 1));
+ dev = pcidev_on_root(I2C1_DEV, bus + 1);
base_ptr = (char *)pci_read_config32(dev, PCI_BASE_ADDRESS_0);
if (base_ptr == NULL) {
printk(BIOS_INFO, "I2C: Invalid Base address\n");
@@ -230,7 +230,7 @@ int i2c_write(unsigned bus, unsigned chip, unsigned addr,
int stat;
/* Get base address of desired I2C-controller */
- dev = dev_find_slot(0, PCI_DEVFN(I2C1_DEV, bus + 1));
+ dev = pcidev_on_root(I2C1_DEV, bus + 1);
base_ptr = (char *)pci_read_config32(dev, PCI_BASE_ADDRESS_0);
if (base_ptr == NULL) {
return I2C_ERR_INVALID_ADR;
diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c
index 93cd2f251d..416746d79e 100644
--- a/src/soc/intel/fsp_baytrail/northcluster.c
+++ b/src/soc/intel/fsp_baytrail/northcluster.c
@@ -92,7 +92,7 @@ static int get_pcie_bar(u32 *base)
*base = 0;
- dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ dev = pcidev_on_root(0, 0);
if (!dev)
return 0;
diff --git a/src/soc/intel/fsp_baytrail/pmutil.c b/src/soc/intel/fsp_baytrail/pmutil.c
index 402842eb74..6e4a7c8ef5 100644
--- a/src/soc/intel/fsp_baytrail/pmutil.c
+++ b/src/soc/intel/fsp_baytrail/pmutil.c
@@ -41,7 +41,7 @@ static struct device *pcu_dev;
static struct device *get_pcu_dev(void)
{
if (pcu_dev == NULL)
- pcu_dev = dev_find_slot(0, PCI_DEVFN(PCU_DEV, 0));
+ pcu_dev = pcidev_on_root(PCU_DEV, 0);
return pcu_dev;
}
#endif
diff --git a/src/soc/intel/fsp_baytrail/ramstage.c b/src/soc/intel/fsp_baytrail/ramstage.c
index f4cdaa8300..754c5f5c45 100644
--- a/src/soc/intel/fsp_baytrail/ramstage.c
+++ b/src/soc/intel/fsp_baytrail/ramstage.c
@@ -78,7 +78,7 @@ static void fill_in_pattrs(void)
struct pattrs *attrs = (struct pattrs *)pattrs_get();
attrs->cpuid = cpuid_eax(1);
- dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
+ dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
attrs->revid = pci_read_config8(dev, REVID);
/* The revision to stepping IDs have two values per metal stepping. */
if (attrs->revid >= RID_D_STEPPING_START) {
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 4537bcc339..41d5150f4d 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -254,11 +254,9 @@ static ich9_spi_regs *spi_regs(void)
uint32_t sbase;
#ifdef __SMM__
- pci_devfn_t dev;
- dev = PCI_DEV(0, LPC_DEV, LPC_FUNC);
+ pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC);
#else
- struct device *dev;
- dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
+ struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
#endif
pci_read_config_dword(dev, SBASE, &sbase);
sbase &= ~0x1ff;