cpu: microcode: Use microcode stored in binary format

Using a copiler to compile something that's already a binary is pretty
stupid. Now that Stefan converted most microcode in blobs to a plain
binary, use the binary version.

Change-Id: Iecf1f0cdf7bbeb7a61f46a0cd984ba341af787ce
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11607
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

4 files changed, 2 insertions, 71 deletions

diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc
index 39a253f692..7370830fc6 100644
--- a/src/soc/intel/fsp_baytrail/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/Makefile.inc
@@ -20,7 +20,6 @@
 
 ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y)
 
-subdirs-y += microcode
 subdirs-y += romstage
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
@@ -59,6 +58,8 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
 ramstage-y += placeholders.c
 ramstage-y += i2c.c
 
+cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin
+
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp
 
diff --git a/src/soc/intel/fsp_baytrail/microcode/Makefile.inc b/src/soc/intel/fsp_baytrail/microcode/Makefile.inc
deleted file mode 100644
index 506291d301..0000000000
--- a/src/soc/intel/fsp_baytrail/microcode/Makefile.inc
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2014 Sage Electronic Engineering, LLC.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc.
-#
-cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
-CPPFLAGS_romstage += -I$(src)/soc/intel/fsp_baytrail/microcode
-
-ifneq ($(CONFIG_MICROCODE_INCLUDE_PATH),)
-ifneq ($(wildcard $(shell readlink -f "$(top)/$(CONFIG_MICROCODE_INCLUDE_PATH)")),)
-CPPFLAGS_common += -I$(CONFIG_MICROCODE_INCLUDE_PATH)
-endif
-endif
diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c b/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
deleted file mode 100644
index 822c91baf5..0000000000
--- a/src/soc/intel/fsp_baytrail/microcode/microcode_blob.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-unsigned microcode[] = {
-
-		/*
- * The problem is that these microcode files are not in the tree. They come
- * with FSP, so let the user deal with the include paths when HAVE_FSP_BIN
- * is enabled.
- */
-#if IS_ENABLED(CONFIG_HAVE_FSP_BIN)
-#if !IS_ENABLED(CONFIG_SOC_INTEL_FSP_BAYTRAIL_MD)
-	/* Region size is 0x30000 - update in microcode_size.h if it gets larger. */
-	#include "M0230672228.h"  // M0230672: Bay Trail "Super SKU" B0/B1
-	#include "M0130673322.h"  // M0130673: Bay Trail I B2 / B3
-	#include "M0130679901.h"  // M0130679: Bay Trail I D0
-#else
-	/* Region size is 0x10000 - update in microcode_size.h if it gets larger. */
-	#include "M0C30678829.h"  // M0C30678: Bay Trail M D Stepping
-#endif	/* CONFIG_SOC_INTEL_FSP_BAYTRAIL_MD */
-#endif	/* CONFIG_HAVE_FSP_BIN */
-};
diff --git a/src/soc/intel/fsp_baytrail/microcode/microcode_size.h b/src/soc/intel/fsp_baytrail/microcode/microcode_size.h
deleted file mode 100644
index 2af22016cb..0000000000
--- a/src/soc/intel/fsp_baytrail/microcode/microcode_size.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* Maximum size of the area that the FSP will search for the correct microcode */
-#if !IS_ENABLED(CONFIG_SOC_INTEL_FSP_BAYTRAIL_MD)
-	#define MICROCODE_REGION_LENGTH 0x30000
-#else
-	#define MICROCODE_REGION_LENGTH 0x10000
-#endif