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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-02-07 12:44:00 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-02-28 10:34:43 +0000
commit7ba14406c30f90cebde9f539f1987348cfc998e4 (patch)
treee3ead89f5e263ff9edeb0855df13c6722e64db35 /src/soc/intel/fsp_baytrail
parent17387f67ad0d286332e4c498de08354a37e61fdb (diff)
downloadcoreboot-7ba14406c30f90cebde9f539f1987348cfc998e4.tar.xz
intel/spi: Switch to native PCI config accessors
Change-Id: If7190ac105b2a65a9576709955c3cc840b95dcdf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail')
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c34
1 files changed, 3 insertions, 31 deletions
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index a9c0454c7f..275b038b39 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -22,42 +22,14 @@
#include <delay.h>
#include <arch/io.h>
#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
#include <spi_flash.h>
#include <spi-generic.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
-#ifdef __SMM__
-#define pci_read_config_byte(dev, reg, targ)\
- *(targ) = pci_read_config8(dev, reg)
-#define pci_read_config_word(dev, reg, targ)\
- *(targ) = pci_read_config16(dev, reg)
-#define pci_read_config_dword(dev, reg, targ)\
- *(targ) = pci_read_config32(dev, reg)
-#define pci_write_config_byte(dev, reg, val)\
- pci_write_config8(dev, reg, val)
-#define pci_write_config_word(dev, reg, val)\
- pci_write_config16(dev, reg, val)
-#define pci_write_config_dword(dev, reg, val)\
- pci_write_config32(dev, reg, val)
-#else /* !__SMM__ */
-#include <device/device.h>
-#include <device/pci.h>
-#define pci_read_config_byte(dev, reg, targ)\
- *(targ) = pci_read_config8(dev, reg)
-#define pci_read_config_word(dev, reg, targ)\
- *(targ) = pci_read_config16(dev, reg)
-#define pci_read_config_dword(dev, reg, targ)\
- *(targ) = pci_read_config32(dev, reg)
-#define pci_write_config_byte(dev, reg, val)\
- pci_write_config8(dev, reg, val)
-#define pci_write_config_word(dev, reg, val)\
- pci_write_config16(dev, reg, val)
-#define pci_write_config_dword(dev, reg, val)\
- pci_write_config32(dev, reg, val)
-#endif /* !__SMM__ */
-
typedef struct spi_slave ich_spi_slave;
static int ichspi_lock = 0;
@@ -258,7 +230,7 @@ static ich9_spi_regs *spi_regs(void)
#else
struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
#endif
- pci_read_config_dword(dev, SBASE, &sbase);
+ sbase = pci_read_config32(dev, SBASE);
sbase &= ~0x1ff;
return (void *)sbase;