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authorElyes HAOUAS <ehaouas@noos.fr>2016-08-25 21:07:59 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:09:42 +0200
commit4a83f1cf24b793db40606febb8e27cee90452590 (patch)
tree74943b190d2aa7c97da72d59f816157d4bc947e9 /src/soc/intel/fsp_baytrail
parent3c80408fc8aa7b4099493acd7420f8d62ce65a48 (diff)
downloadcoreboot-4a83f1cf24b793db40606febb8e27cee90452590.tar.xz
src/soc: Add required space before opening parenthesis '('
Change-Id: Ifc47f103492a2cd6c818dfd64be971d34afbe0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16324 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/fsp_baytrail')
-rw-r--r--src/soc/intel/fsp_baytrail/southcluster.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index a3f4e7f216..a547152b5c 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -190,7 +190,7 @@ static void write_pci_config_irqs(void)
* the Interrupt Route registers in the ILB
*/
printk(BIOS_DEBUG, "PCI_CFG IRQ: Write PCI config space IRQ assignments\n");
- for(irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
+ for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
if ((irq_dev->path.type != DEVICE_PATH_PCI) ||
(!irq_dev->enabled))
@@ -287,7 +287,7 @@ static void sc_pirq_init(device_t dev)
write16(ir_base + i, ir->pcidev[i]);
/* If the entry is more than just 0, print it out */
- if(ir->pcidev[i]) {
+ if (ir->pcidev[i]) {
printk(BIOS_SPEW, " %d: ", i);
for (j = 0; j < 4; j++) {
pirq = (ir->pcidev[i] >> (j * 4)) & 0xF;