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| author | Werner Zeh <werner.zeh@siemens.com> | 2017-10-16 08:37:28 +0200 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-19 15:13:40 +0000 |
| commit | 4bf11ce2b5de81ec0bd6799f4830a48c7376c122 (patch) | |
| tree | d2e34db2f81666fcd969930a2f2565e8e64cc045 /src/soc/intel/fsp_broadwell_de/Makefile.inc | |
| parent | e77d588ee46bfdff1a152f166eca84e3c5827665 (diff) | |
| download | coreboot-4bf11ce2b5de81ec0bd6799f4830a48c7376c122.tar.xz | |
soc/fsp_broadwell_de: Add support for GPIO handling
Add functionality to initialize, set and read back GPIOs on FSP based
Broadwell-DE implementation.
Change-Id: Ibbd86e2142bbf5772eb4a91ebb9166c31d52476e
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/22034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/Makefile.inc')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Makefile.inc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc index 38cc4411db..fc6cdd3d42 100644 --- a/src/soc/intel/fsp_broadwell_de/Makefile.inc +++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc @@ -11,6 +11,8 @@ subdirs-y += ../../../cpu/x86/cache subdirs-y += ../../../lib/fsp subdirs-y += fsp +romstage-y += gpio.c + ramstage-y += spi.c ramstage-y += cpu.c ramstage-y += chip.c @@ -27,6 +29,7 @@ ramstage-y += smbus_common.c ramstage-y += smbus.c romstage-y += tsc_freq.c ramstage-y += smi.c +ramstage-y += gpio.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c |