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authorYork Yang <york.yang@intel.com>2016-03-09 10:54:26 -0800
committerMartin Roth <martinroth@google.com>2016-04-14 19:02:07 +0200
commitd7cba288e4eb17e6e5c80b7ac4465357e0fbd31a (patch)
treef9544dca89728a720776f66f9e7414f5a847c071 /src/soc/intel/fsp_broadwell_de/reset.c
parentcd9aec6fb04f3fcd59d053930f93d288358bf1ad (diff)
downloadcoreboot-d7cba288e4eb17e6e5c80b7ac4465357e0fbd31a.tar.xz
soc/intel: Add Broadwell-DE SoC support
Initial files to support Broadwell-DE SoC. This is FSP 1.0 based project and is based on Broadwell-DE Gold release. Change has been verified on Intel Camelback Mountain CRB. Change-Id: I20ce8ee8dd1113a7a20a96910292697421f1ca57 Signed-off-by: York Yang <york.yang@intel.com> Reviewed-on: https://review.coreboot.org/14014 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/reset.c')
-rw-r--r--src/soc/intel/fsp_broadwell_de/reset.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/reset.c b/src/soc/intel/fsp_broadwell_de/reset.c
new file mode 100644
index 0000000000..7e1c582749
--- /dev/null
+++ b/src/soc/intel/fsp_broadwell_de/reset.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <soc/reset.h>
+
+void warm_reset(void)
+{
+ outb(0x00, 0xcf9);
+ outb(0x06, 0xcf9);
+}
+
+void hard_reset(void)
+{
+ warm_reset();
+}