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| author | Andrey Petrov <anpetrov@fb.com> | 2019-07-29 14:41:35 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-08-14 03:34:42 +0000 |
| commit | f377fafd941a44252c4c7527ba08f798d222e7ff (patch) | |
| tree | c90e095c3234bf0ecb4abc2ccb6a8f1107fb7c37 /src/soc/intel/fsp_broadwell_de | |
| parent | c0193c92379e19add78e4e3668fd222e4d041672 (diff) | |
| download | coreboot-f377fafd941a44252c4c7527ba08f798d222e7ff.tar.xz | |
common/block/imc: Add Integrated Memory Controller (IMC) driver
IMC is found on certain Xeon processors. On such platforms SPDs are not
connected to SMBus on PCH but to dedicated IMC-owned pins. The purpose
of this driver is to expose access to the i2c/smbus controller associated
with IMC.
Datasheet used: Intel Xeon Processor D-1500 Product Family, Volume 2,
reference 332051-001
This driver is largely based on i2c-imc.c Linux driver.
https://lwn.net/Articles/685475/
TEST=single/double reads and single writes on Xeon-D1500.
Hardware: Open Compute Project Monolake platform.
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Change-Id: Idbcda1c2273b9a5721fcd9470b4de182192779e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34678
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index 98969752b3..7783f78599 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -26,6 +26,9 @@ config CPU_SPECIFIC_OPTIONS select TSC_CONSTANT_RATE select HAVE_FSP_BIN select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select SOC_INTEL_COMMON + select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_IMC config VBOOT select VBOOT_STARTS_IN_ROMSTAGE |