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| author | Subrata Banik <subrata.banik@intel.com> | 2019-05-15 21:04:37 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-20 14:50:06 +0000 |
| commit | dd5fa024260bf6fd19c077d640c34e27b742115b (patch) | |
| tree | 80a9d0a23d23325a454e4bf65002ad54271688e3 /src/soc/intel/icelake/chip.c | |
| parent | abdc9bc8c8605f2865b7a9cc956cbcc4402c1c43 (diff) | |
| download | coreboot-dd5fa024260bf6fd19c077d640c34e27b742115b.tar.xz | |
soc/intel/icelake: Make use of gpio_pm_configure()
Provide option in chip.h to set dynamic local clock gating
setting.
BUG=b:130764684
TEST=Able to build and boot ICL.
Change-Id: Ic30a490aadb8cc9c05a19a05533ab0196c69b7f1
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/icelake/chip.c')
| -rw-r--r-- | src/soc/intel/icelake/chip.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 11d14de084..2616db1768 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -103,6 +103,27 @@ const char *soc_acpi_name(const struct device *dev) } #endif +/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +static void soc_fill_gpio_pm_configuration(void) +{ + uint8_t value[TOTAL_GPIO_COMM]; + const struct device *dev; + dev = pcidev_on_root(SA_DEV_SLOT_ROOT, 0); + if (!dev || !dev->chip_info) + return; + + const config_t *config = dev->chip_info; + + if (config->gpio_override_pm) + memcpy(value, config->gpio_pm, sizeof(uint8_t) * + TOTAL_GPIO_COMM); + else + memset(value, MISCCFG_ENABLE_GPIO_PM_CONFIG, sizeof(uint8_t) * + TOTAL_GPIO_COMM); + + gpio_pm_configure(value, TOTAL_GPIO_COMM); +} + void soc_init_pre_device(void *chip_info) { /* Snapshot the current GPIO IRQ polarities. FSP is setting a @@ -117,6 +138,8 @@ void soc_init_pre_device(void *chip_info) /* Restore GPIO IRQ polarities back to previous settings. */ itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); + + soc_fill_gpio_pm_configuration(); } static void pci_domain_set_resources(struct device *dev) |