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authorSubrata Banik <subrata.banik@intel.com>2018-10-31 23:08:14 +0530
committerSubrata Banik <subrata.banik@intel.com>2019-06-13 04:38:08 +0000
commit3d152ac388fa43b4c3d1bfeedcb6a40f1479ace3 (patch)
treeca39c17047de8a3059cea7314f95910f2b45a8a1 /src/soc/intel/icelake/chip.c
parent8a70918b8a78d8d5cd27e830cc4ae496b10d4f32 (diff)
downloadcoreboot-3d152ac388fa43b4c3d1bfeedcb6a40f1479ace3.tar.xz
soc/intel/icelake: Replace PCI device LPC to ESPI as per EDS
As per Icelake EDS PCI device B:D:F (0:0x1f:0) referred as ESPI, hence modify SoC code to reflect the same. This patch replaces all SoC specific PCI LPC references with ESPI except anything that touches intel common code block. Change-Id: I4990ea6d9b7b4c0eac2b3eea559f5469f086e827 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Diffstat (limited to 'src/soc/intel/icelake/chip.c')
-rw-r--r--src/soc/intel/icelake/chip.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index 2616db1768..eff1c7a17c 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -89,7 +89,8 @@ const char *soc_acpi_name(const struct device *dev)
case PCH_DEVFN_GSPI2: return "SPI2";
case PCH_DEVFN_EMMC: return "EMMC";
case PCH_DEVFN_SDCARD: return "SDXC";
- case PCH_DEVFN_LPC: return "LPCB";
+ /* Keeping ACPI device name coherent with ec.asl */
+ case PCH_DEVFN_ESPI: return "LPCB";
case PCH_DEVFN_P2SB: return "P2SB";
case PCH_DEVFN_PMC: return "PMC_";
case PCH_DEVFN_HDA: return "HDAS";