summaryrefslogtreecommitdiff
path: root/src/soc/intel/icelake/fsp_params.c
diff options
context:
space:
mode:
authorHuayang Duan <huayang.duan@mediatek.com>2020-01-20 11:42:42 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-02-25 10:20:55 +0000
commit68bb307418a691359bddb801a7b7a2c48c5c1297 (patch)
treeafb841778ce84ff83f879bbc3f17a60d8adad54b /src/soc/intel/icelake/fsp_params.c
parentd2bba86bf7200362d8801fa475bc2c1ff935c8d7 (diff)
downloadcoreboot-68bb307418a691359bddb801a7b7a2c48c5c1297.tar.xz
soc/mediatek/mt8183: Fix programming error of DRAMC setting
1. The ac timing of 2400Mbps should use diff params with 1600Mbps. 2. Fix the typo error of save shuffle function for DVFS. BRANCH=kukui BUG=none TEST=emerge-kukui coreboot Change-Id: I5edac32938def50836f386426e7deb652b80d42d Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/intel/icelake/fsp_params.c')
0 files changed, 0 insertions, 0 deletions