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| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2019-01-08 19:52:54 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-16 12:44:17 +0000 |
| commit | c896e92eaad8e255c1cef65b9da2367742a61e5f (patch) | |
| tree | 4cc223ff714a75c4355c3fa5ce8c81261181612d /src/soc/intel/icelake/gspi.c | |
| parent | e97e90959c6d7424911bfbc0096d6054cb27c434 (diff) | |
| download | coreboot-c896e92eaad8e255c1cef65b9da2367742a61e5f.tar.xz | |
soc/intel/cannonlake: Add processor power limits control support
Add processor power limits control support to configure values.
BRANCH=None
BUG=b:122343940
TEST=Built and tested on Arcada system
Change-Id: I5990dc05b51481a0074855914cef20cf07378cde
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/30907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/icelake/gspi.c')
0 files changed, 0 insertions, 0 deletions