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| author | Jonathan Zhang <jonzhang@fb.com> | 2020-06-17 16:03:18 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-25 11:57:32 +0000 |
| commit | 01e38559c36e5ca9e1cf69c7a674bf10aa156dd9 (patch) | |
| tree | 8805140d953fd65ccee600bbc4b418594d2e672b /src/soc/intel/icelake/sd.c | |
| parent | 951a409f669138bae25e255ec131b5fe0b0daec0 (diff) | |
| download | coreboot-01e38559c36e5ca9e1cf69c7a674bf10aa156dd9.tar.xz | |
drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1
Not all FSPs based on FSP 2.1 supports the feature of external PPI
interface pulled in via FSP_PEIM_TO_PEIM_INTERFACE.
Deselect FSP_PEIM_TO_PEIM_INTERFACE when PLATFORM_USES_FSP2_1 is
selected.
Update Kconfig of SOCs affected (icelake, jasperlake, tigerlake).
Change-Id: I5df03f8bcf15c9e05c9fd904a79f740260a3aed7
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/icelake/sd.c')
0 files changed, 0 insertions, 0 deletions