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| author | Marco Chen <marcochen@chromium.org> | 2020-04-10 14:33:19 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-14 09:56:18 +0000 |
| commit | 4f771fe98b893f03703e9081a29d08459111c2b2 (patch) | |
| tree | acade1d3742a733de63411972f09c53b4faaa87c /src/soc/intel/jasperlake/include | |
| parent | dd1a0acc4a1a08d3ff446fa84c41307eead91f11 (diff) | |
| download | coreboot-4f771fe98b893f03703e9081a29d08459111c2b2.tar.xz | |
soc/intel/jasperlake: Allow mainboard to override DRAM part number
In order to support mainboards that do not store DRAM part number in
the traditional way i.e. within the CBFS SPD for soldered memory, this
change provides a runtime callback to allow mainboards to provide DRAM
part number from a custom location e.g. external EEPROM on dedede.
For other boards it should be a NOP since the weak implementation of
mainboard_get_dram_part_num does nothing.
BUG=b:152019429
Change-Id: I7ba635f5504ba288308d7d7a4935f405f289aa8d
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40302
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/jasperlake/include')
| -rw-r--r-- | src/soc/intel/jasperlake/include/soc/romstage.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/include/soc/romstage.h b/src/soc/intel/jasperlake/include/soc/romstage.h index 4a4fbe63b8..e3c7969127 100644 --- a/src/soc/intel/jasperlake/include/soc/romstage.h +++ b/src/soc/intel/jasperlake/include/soc/romstage.h @@ -6,6 +6,8 @@ #include <fsp/api.h> +/* Provide a callback to allow mainboard to override the DRAM part number. */ +bool mainboard_get_dram_part_num(const char **part_num, size_t *len); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void pch_init(void); |