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| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-05-08 21:31:44 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-18 07:10:13 +0000 |
| commit | e8d1bef8cbd78c00065381848030655d34d0ecd3 (patch) | |
| tree | 7bea607316e936a8f7370b32689d35ea3c0f0e08 /src/soc/intel/jasperlake/include | |
| parent | 4fafd412090d7de9a2ec6232ed22bbb1b1ce5dde (diff) | |
| download | coreboot-e8d1bef8cbd78c00065381848030655d34d0ecd3.tar.xz | |
jasperlake: update processor power limits configuration
Update processor power limit configuration parameters based on
common code base support for Intel Jasperlake SoC based platforms.
BRANCH=None
BUG=None
TEST=Built for jasperlake system
Change-Id: I9b725d041dcb8847f83ec103e58b9571b4c596ac
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41237
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/jasperlake/include')
| -rw-r--r-- | src/soc/intel/jasperlake/include/soc/cpu.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/jasperlake/include/soc/cpu.h b/src/soc/intel/jasperlake/include/soc/cpu.h index 58e9a8f590..1e5332de51 100644 --- a/src/soc/intel/jasperlake/include/soc/cpu.h +++ b/src/soc/intel/jasperlake/include/soc/cpu.h @@ -30,7 +30,4 @@ C_STATE_LATENCY_MICRO_SECONDS(C_STATE_LATENCY_CONTROL_ ##reg## _LIMIT, \ (IRTL_1024_NS >> 10)) -/* Configure power limits for turbo mode */ -void set_power_limits(u8 power_limit_1_time); - #endif |