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| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 12:26:51 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-21 14:21:26 +0000 |
| commit | 73a22edcc8894c34df1234ae02d5318f18e3f7b8 (patch) | |
| tree | 3c873966bbef0715d9081e2eb04791455f7662c6 /src/soc/intel/jasperlake | |
| parent | 84d10cc5d38d706ffecd0cd60f6e1f9d90064f96 (diff) | |
| download | coreboot-73a22edcc8894c34df1234ae02d5318f18e3f7b8.tar.xz | |
soc/intel: Fix typo in comment
rotine ---> routine
Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/jasperlake')
| -rw-r--r-- | src/soc/intel/jasperlake/chip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c index 1051fbc9ab..ea29fd8b43 100644 --- a/src/soc/intel/jasperlake/chip.c +++ b/src/soc/intel/jasperlake/chip.c @@ -104,7 +104,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; |