diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-10-22 00:36:16 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-26 06:55:18 +0000 |
| commit | 468c46df25612e1928f632a78d26fcbb74ad4281 (patch) | |
| tree | dfbea0ed99198d2833ba56ac49ca8fede3608fec /src/soc/intel/jasperlake | |
| parent | b11b731e80344a6460fb36010bb3785fd0ab59ca (diff) | |
| download | coreboot-468c46df25612e1928f632a78d26fcbb74ad4281.tar.xz | |
Revert "soc/intel/jasperlake: Allow mainboard to override chip configuration"
This reverts commit 5acea15d63e821a1bc416d206162ed030cd5d57c. This
change got accidentally merged. There is no need for mainboard to
override chip configuration.
BUG=None
TEST=Build and boot Drawlat to OS.
Change-Id: I166ba7e5ee50a6329032eae8e17b9a554b094e2e
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/jasperlake')
| -rw-r--r-- | src/soc/intel/jasperlake/fsp_params.c | 8 | ||||
| -rw-r--r-- | src/soc/intel/jasperlake/include/soc/ramstage.h | 1 |
2 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c index cb0070a879..db27234067 100644 --- a/src/soc/intel/jasperlake/fsp_params.c +++ b/src/soc/intel/jasperlake/fsp_params.c @@ -78,11 +78,6 @@ static void parse_devicetree(FSP_S_CONFIG *params) sizeof(config->SerialIoUartMode)); } -__weak void mainboard_update_soc_chip_config(struct soc_intel_jasperlake_config *config) -{ - /* Override settings per board. */ -} - /* UPD parameters to be initialized before SiliconInit */ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) { @@ -91,9 +86,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) FSP_S_CONFIG *params = &supd->FspsConfig; struct soc_intel_jasperlake_config *config = config_of_soc(); - /* Allow mainboard to override any chip config */ - mainboard_update_soc_chip_config(config); - /* Parse device tree and fill in FSP UPDs */ parse_devicetree(params); diff --git a/src/soc/intel/jasperlake/include/soc/ramstage.h b/src/soc/intel/jasperlake/include/soc/ramstage.h index 1de8e37758..8188fbdb84 100644 --- a/src/soc/intel/jasperlake/include/soc/ramstage.h +++ b/src/soc/intel/jasperlake/include/soc/ramstage.h @@ -9,7 +9,6 @@ #include <soc/soc_chip.h> void mainboard_silicon_init_params(FSP_S_CONFIG *params); -void mainboard_update_soc_chip_config(struct soc_intel_jasperlake_config *config); void soc_init_pre_device(void *chip_info); #endif |