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authorLee Leahy <leroy.p.leahy@intel.com>2016-05-02 14:31:02 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-05-04 22:36:53 +0200
commit4dd34eee092276e47a9be41ff9a51dfcde38d759 (patch)
treeabdacd55254200959e82094f6f9c0bf962235661 /src/soc/intel/quark/Kconfig
parent5c4ddebb1631165f9bd36f6ea629b39a290afff4 (diff)
downloadcoreboot-4dd34eee092276e47a9be41ff9a51dfcde38d759.tar.xz
soc/intel/quark: Add USB PHY initialization
Add register access support using register scripts. Initialize the USB PHY using register scripts. TEST=Build and run on Galileo Gen2 Change-Id: I34a8e78eab3c7314ca34343eccc8aeef0622798a Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14496 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/Kconfig')
-rw-r--r--src/soc/intel/quark/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index aab509a673..8485aa3a87 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_RAMSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_VERSTAGE_X86_32
+ select REG_SCRIPT
select SOC_INTEL_COMMON
select SOC_SETS_MTRRS
select TSC_CONSTANT_RATE