diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-30 14:06:25 -0700 |
---|---|---|
committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-31 22:07:49 +0200 |
commit | a5258cba6fc2b6cf47380581065cc22f06ecccae (patch) | |
tree | 002b1a081c08dfb3e5de5cc229f84b88b8ae0908 /src/soc/intel/quark/Makefile.inc | |
parent | 56c99f28501bbb79a9f8b7a1e1bd698788b42f0e (diff) | |
download | coreboot-a5258cba6fc2b6cf47380581065cc22f06ecccae.tar.xz |
soc/intel/quark: Split I2C out from driver
Split out the I2C code to allow I2C transactions during early romstage.
TEST=Build and run on Galileo Gen2
Change-Id: I87ceb0a8cf660e4337738b3bcde9d4fdeae0159d
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15007
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/Makefile.inc')
-rw-r--r-- | src/soc/intel/quark/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index 08325e7023..d7470797fa 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -18,6 +18,7 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y) subdirs-y += romstage subdirs-y += ../../../cpu/x86/tsc +romstage-y += i2c.c romstage-y += memmap.c romstage-y += reg_access.c romstage-y += tsc_freq.c @@ -27,6 +28,7 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += chip.c ramstage-y += ehci.c ramstage-y += gpio_i2c.c +ramstage-y += i2c.c ramstage-y += lpc.c ramstage-y += memmap.c ramstage-y += northcluster.c |