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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-10-24 00:19:45 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-10-26 15:47:49 +0000 |
| commit | b17f3d3d3cdd215edcff492699c744a4c85908d0 (patch) | |
| tree | c01f9b096a9f54d767654578809d1652890b2228 /src/soc/intel/quark/romstage | |
| parent | 7ef19036fbfeaad63ccb4dde26b3133d6128d0b8 (diff) | |
| download | coreboot-b17f3d3d3cdd215edcff492699c744a4c85908d0.tar.xz | |
soc,mb/intel: clean up remaining FSP2.0 socs/boards
Remove CONFIG_...FSP2.0 based if-switches from FSP2.0-only socs/boards
Change-Id: Iae92dc2e2328b14c78ac686aaf326bd68430933b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36279
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/quark/romstage')
| -rw-r--r-- | src/soc/intel/quark/romstage/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/soc/intel/quark/romstage/fsp_params.c (renamed from src/soc/intel/quark/romstage/fsp2_0.c) | 0 |
2 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/quark/romstage/Makefile.inc b/src/soc/intel/quark/romstage/Makefile.inc index 13963d4b23..d90a3af5d4 100644 --- a/src/soc/intel/quark/romstage/Makefile.inc +++ b/src/soc/intel/quark/romstage/Makefile.inc @@ -14,10 +14,8 @@ # romstage-y += car.c -ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y) romstage-$(CONFIG_DISPLAY_UPD_DATA) += debug.c -romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0.c -endif # CONFIG_PLATFORM_USES_FSP2_0 +romstage-y += fsp_params.c romstage-y += mtrr.c romstage-y += pcie.c romstage-y += report_platform.c diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp_params.c index cd654d74de..cd654d74de 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp_params.c |