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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-06-21 16:20:55 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 13:09:54 +0000
commite7377556cc33b10fdba6d956ac83d823478f5eb4 (patch)
tree8843182316aed1730edb12aa0fbc18de4d3be414 /src/soc/intel/quark
parentc70eed1e6202c928803f3e7f79161cd247a62b23 (diff)
downloadcoreboot-e7377556cc33b10fdba6d956ac83d823478f5eb4.tar.xz
device: Use pcidev_path_on_root()
Change-Id: I2e28b9f4ecaf258bff8a062b5a54cb3d8e2bb9b0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel/quark')
-rw-r--r--src/soc/intel/quark/romstage/fsp1_1.c2
-rw-r--r--src/soc/intel/quark/romstage/fsp2_0.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/quark/romstage/fsp1_1.c b/src/soc/intel/quark/romstage/fsp1_1.c
index d5c5f19b4e..88f7376ede 100644
--- a/src/soc/intel/quark/romstage/fsp1_1.c
+++ b/src/soc/intel/quark/romstage/fsp1_1.c
@@ -84,7 +84,7 @@ void soc_memory_init_params(struct romstage_params *params,
size_t rmu_data_len;
/* Locate the configuration data from devicetree.cb */
- dev = dev_find_slot(0, LPC_DEV_FUNC);
+ dev = pcidev_path_on_root(LPC_DEV_FUNC);
if (!dev) {
printk(BIOS_CRIT,
"Error! Device (PCI:0:%02x.%01x) not found, "
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index 3e6198805d..23051bde6d 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -120,7 +120,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
die("Microcode file (rmu.bin) not found.");
/* Locate the configuration data from devicetree.cb */
- dev = dev_find_slot(0, LPC_DEV_FUNC);
+ dev = pcidev_path_on_root(LPC_DEV_FUNC);
if (!dev)
die("ERROR - LPC device not found!");
config = dev->chip_info;