summaryrefslogtreecommitdiff
path: root/src/soc/intel/sch/pcie.c
diff options
context:
space:
mode:
authorAlexandru Gagniuc <alexandrux.gagniuc@intel.com>2016-05-18 10:26:53 -0700
committerMartin Roth <martinroth@google.com>2016-05-26 23:46:59 +0200
commit944655dadaf595bf655f266eb35ca2f17c8410eb (patch)
treee46e82eb696aa89d0450de77376be8aa4cd5f6e4 /src/soc/intel/sch/pcie.c
parentbbac5ace53d57ad9acb0f979850c6a5e72c5f874 (diff)
downloadcoreboot-944655dadaf595bf655f266eb35ca2f17c8410eb.tar.xz
soc/apollolake: Use simpler macros for the northbridge PCI device
The NB_DEV_ROOT macro, is almost unreadable, as it depends on other stringified macros, and acts differently depending on the coreboot stage. For ramstage, it also hides a function call. Rewrite the macro in terms of more basic and readable macros. Change-Id: I9b7071d67c8d58926e9b01fadaa239db1120448c Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com> Reviewed-on: https://review.coreboot.org/14890 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/sch/pcie.c')
0 files changed, 0 insertions, 0 deletions