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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-15 13:32:24 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-17 20:26:28 +0200 |
| commit | 083da160af4a0e3a76506af59477f105d78b9683 (patch) | |
| tree | 7078353691e6607737d7e606a836106874b094a1 /src/soc/intel/sch/pcie.c | |
| parent | 4c56a58f63699dc54383dc4f8402d14ddbca5114 (diff) | |
| download | coreboot-083da160af4a0e3a76506af59477f105d78b9683.tar.xz | |
soc/intel/quark: Add GPIO register access
Add register access routines for the GPIO and legacy GPIO controllers.
TEST=Build and run on Galileo Gen2
Change-Id: I0c023428f4784de9e025279480554b8ed134afca
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14825
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/sch/pcie.c')
0 files changed, 0 insertions, 0 deletions