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| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-06-06 23:51:57 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-09 16:56:54 +0200 |
| commit | 930577ac7b090e9af0a988560c3445b7ba78f08c (patch) | |
| tree | ab9682cd84fe13cb932bbb862f59beacfb3476b9 /src/soc/intel/sch/reset.c | |
| parent | f6cfa71217f8a8b42e1f6fe8be6b91d2ef0bca63 (diff) | |
| download | coreboot-930577ac7b090e9af0a988560c3445b7ba78f08c.tar.xz | |
soc/baytrail: assign unique DMA request lines to I2C controllers
Each I2C controller should have a unique pair of DMA request lines,
and DMA channels should be assigned incrementally, rolling over as
necessary.
Source: Intel Baytrail/ValleyView UEFI reference code
Change-Id: Icc9b27aaa14583d11d325e43d9165ddda72ca865
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/sch/reset.c')
0 files changed, 0 insertions, 0 deletions