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| author | Furquan Shaikh <furquan@chromium.org> | 2017-03-31 14:02:47 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-04-06 00:45:36 +0200 |
| commit | 05a6f29d32c246569b7a0561d35ccbf49eec1fb8 (patch) | |
| tree | a0347e4edb13a2f3bebcbbf8745a4af0a5f18969 /src/soc/intel/skylake/Kconfig | |
| parent | 108f87262bf47ce3549fa0c5ed16a40fe916656f (diff) | |
| download | coreboot-05a6f29d32c246569b7a0561d35ccbf49eec1fb8.tar.xz | |
soc/intel/skylake: Add support for GSPI controller
Sky Lake PCH contains two GSPI controllers. Using the common GSPI
controller driver implementation for Intel PCH, add support for GSPI
controller buses on Sky Lake/Kaby Lake.
BUG=b:35583330
Change-Id: I29b1d4d5a6ee4093f2596065ac375c06f17d33ac
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19099
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/Kconfig')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index df8ae2bd2d..82e5d55555 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -50,6 +50,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_GSPI select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_XHCI select SOC_INTEL_COMMON_LPSS_I2C @@ -300,4 +301,8 @@ config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ int default 120 +config SOC_INTEL_COMMON_BLOCK_GSPI_MAX + int + default 2 + endif |