skylake: Add SD card device to configure card detect GPIO

Add a PCI driver for the skylake SD card device and have it generate
an entry in the SSDT for the card detect GPIO if it is provided by the
mainboard in devicetree.

This sets up a card detect GPIO configuration that will trigger an
interrupt on both edges with a 100ms debounce timeout and can wake the
SD controller from D3 state.

The GpioInt() entry is bound to the "cd-gpio" device property which will
be consumed by the kernel driver.

The resulting ACPI output in the SSDT will be combined with the SDXC
device declaration in the DSDT.

Example:

Scope (\_SB.PCI0.SDXC)
{
  Name (_CRS, ResourceTemplate () {
    GpioInt (Edge, ActiveBoth, SharedAndWake, PullNone, 10000,
             "\\_SB.PCI0.GPIO", 0, ResourceConsumer) { 35 }
  })
  Name (_DSD, Package () {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package () {
      Package () { "cd-gpio", Package () { \_SB.PCI0.SDXC, 0, 0, 1 } }
    }
  })
}

Change-Id: Ie4c1bfadd962cf55a987edb9ef86e92174205770
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14995
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index e22214f343..ea1895d9c6 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -53,6 +53,7 @@ ramstage-y += pei_data.c
 ramstage-y += pmc.c
 ramstage-y += pmutil.c
 ramstage-y += ramstage.c
+ramstage-y += sd.c
 ramstage-y += smbus.c
 ramstage-y += smbus_common.c
 ramstage-y += smi.c