diff options
author | Aamir Bohra <aamir.bohra@intel.com> | 2017-05-17 15:13:08 +0530 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-05-22 18:12:27 +0200 |
commit | fd8e00092a7d2b5ccc9bb832a8eafa2f2d1cddbf (patch) | |
tree | 178a41f97ce161be407b4af4d49a38c6bd0c1d34 /src/soc/intel/skylake/Makefile.inc | |
parent | 1b1ecae0a410b3f24ac5b959e8a13a7a97729b5e (diff) | |
download | coreboot-fd8e00092a7d2b5ccc9bb832a8eafa2f2d1cddbf.tar.xz |
soc/intel/skylake: Use Intel SATA common code
Use SATA common code from soc/intel/common/block/sata
and clean up code.
Change-Id: Ib5d65f1afda6b2f8098f1c006623a48cf2690593
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
-rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 21f2f74811..3ce88a73af 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -70,7 +70,6 @@ ramstage-y += pei_data.c ramstage-y += pmc.c ramstage-y += pmutil.c ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c -ramstage-y += sata.c ramstage-y += sd.c ramstage-y += sgx.c ramstage-y += smi.c |