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authorBarnali Sarkar <barnali.sarkar@intel.com>2017-05-04 18:02:17 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-09 19:24:58 +0200
commit0a203d13f672b5cf12a56eaecfbcbe2e081f18ed (patch)
tree7d1d1e101e602102c528851769de3229095c2744 /src/soc/intel/skylake/Makefile.inc
parent19b546f48cb790285afa366dceab9da62cbbe4ac (diff)
downloadcoreboot-0a203d13f672b5cf12a56eaecfbcbe2e081f18ed.tar.xz
soc/intel/skylake: Use CPU common library code
This patch makes SOC files to use common/block/cpu/cpulib.c file's helper functions. Change-Id: I6af56564c6f488f58173ba0beda6912763706f9f Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/19566 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
-rw-r--r--src/soc/intel/skylake/Makefile.inc2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 93eacfb0a8..75d57a9c19 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -45,7 +45,6 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += chip.c
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += chip_fsp20.c
ramstage-y += cpu.c
-ramstage-y += cpu_info.c
ramstage-y += dsp.c
ramstage-y += elog.c
ramstage-y += finalize.c
@@ -73,7 +72,6 @@ ramstage-y += uart.c
ramstage-$(CONFIG_UART_DEBUG) += uart_debug.c
ramstage-y += vr_config.c
-smm-y += cpu_info.c
smm-y += gpio.c
smm-y += pch.c
smm-y += pmutil.c