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authorPratik Prajapati <pratikkumar.v.prajapati@intel.com>2017-06-12 23:02:36 -0700
committerAaron Durbin <adurbin@chromium.org>2017-07-10 17:16:26 +0000
commita04aa3d5662149b70f31e0e6584bd8c6087b5f3b (patch)
tree9886be703d858b08525743fe0bdcf2b921d9b07f /src/soc/intel/skylake/Makefile.inc
parent8c94e14a0c0e77061d8fb879f4bf7bc1347b38d2 (diff)
downloadcoreboot-a04aa3d5662149b70f31e0e6584bd8c6087b5f3b.tar.xz
sgx: Move SGX code to intel/common/block
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX controls building. The SGX feature is still enabled from devicetree.cb. As of now this SGX init supports only KBL (SKL not tested). Support of SGX for new SOCs would be added incrementally in this common code base. Change-Id: I0fbba364b7342e686a2287ea1a910ef9a4eed595 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/20173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
-rw-r--r--src/soc/intel/skylake/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 75d57a9c19..0a8d10577e 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -63,7 +63,6 @@ ramstage-y += pmc.c
ramstage-y += pmutil.c
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
ramstage-y += sd.c
-ramstage-y += sgx.c
ramstage-y += smi.c
ramstage-y += smmrelocate.c
ramstage-y += spi.c