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authorSubrata Banik <subrata.banik@intel.com>2017-11-27 12:14:38 +0530
committerAaron Durbin <adurbin@chromium.org>2017-11-28 20:29:36 +0000
commitfb15d463d2cfaceb4b45d090525179da20ca6b26 (patch)
tree2a57f71046c595b8fd902a26f121c028223a6cfa /src/soc/intel/skylake/Makefile.inc
parentadd7666a47c454df39e86c3782bf736372b765be (diff)
downloadcoreboot-fb15d463d2cfaceb4b45d090525179da20ca6b26.tar.xz
soc/intel/skylake: Make use of Intel common DSP block
TEST=Build and boot soraka/eve. Change-Id: I8be2a90dc4e4c5eb196af57045d2a46b7f0c9722 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
-rw-r--r--src/soc/intel/skylake/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index da45ec54a2..3a6dd2d1dd 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -46,7 +46,6 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += chip.c
ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += chip_fsp20.c
ramstage-y += cpu.c
-ramstage-y += dsp.c
ramstage-y += elog.c
ramstage-y += finalize.c
ramstage-y += gpio.c