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author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-28 13:53:15 +0100 |
---|---|---|
committer | Duncan Laurie <dlaurie@chromium.org> | 2018-11-30 22:02:35 +0000 |
commit | aaced4a932dc68268cebace63df079673960c17b (patch) | |
tree | bf948f7b699b3d954ea65d95a60cf901d8f75d9e /src/soc/intel/skylake/acpi | |
parent | cf9fc1ddfebffc76eaf86aae9ae8afbe9ab5925d (diff) | |
download | coreboot-aaced4a932dc68268cebace63df079673960c17b.tar.xz |
cpu/intel/common: Use a common acpi/cpu.asl file
Change-Id: Ifa5a3a22771ff2e0efa14fb765603fd5e0440d59
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: David Guckian
Diffstat (limited to 'src/soc/intel/skylake/acpi')
-rw-r--r-- | src/soc/intel/skylake/acpi/cpu.asl | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/src/soc/intel/skylake/acpi/cpu.asl b/src/soc/intel/skylake/acpi/cpu.asl deleted file mode 100644 index d42d1bbe51..0000000000 --- a/src/soc/intel/skylake/acpi/cpu.asl +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* These come from the dynamically created CPU SSDT */ -External (\_PR.CNOT, MethodObj) - -/* Notify OS to re-read CPU tables */ -Method (PNOT) -{ - \_PR.CNOT (0x81) -} - -/* Notify OS to re-read CPU _PPC limit */ -Method (PPCN) -{ - \_PR.CNOT (0x80) -} - -/* Notify OS to re-read Throttle Limit tables */ -Method (TNOT) -{ - \_PR.CNOT (0x82) -} |