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author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-05-12 18:23:27 -0700 |
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committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-07-16 17:24:48 +0200 |
commit | 1d14b3e926c15027f9272f1e80b8913fef8cf25d (patch) | |
tree | b3d89ad4bb1b0ea5ac05d1d7dc6cbf26ec93e6c3 /src/soc/intel/skylake/bootblock/timestamp.inc | |
parent | b000513741d330947bb832a5835378e35bdfb394 (diff) | |
download | coreboot-1d14b3e926c15027f9272f1e80b8913fef8cf25d.tar.xz |
soc/intel: Add Skylake SOC support
Add the files to support the Skylake SOC.
Matches chromium tree at 927026db
BRANCH=none
BUG=None
TEST=Build and run on a Skylake platform
Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10341
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/bootblock/timestamp.inc')
-rw-r--r-- | src/soc/intel/skylake/bootblock/timestamp.inc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/bootblock/timestamp.inc b/src/soc/intel/skylake/bootblock/timestamp.inc index f565775ed8..e5041326ee 100644 --- a/src/soc/intel/skylake/bootblock/timestamp.inc +++ b/src/soc/intel/skylake/bootblock/timestamp.inc @@ -1,6 +1,8 @@ -/* Store the initial timestamp for booting in mmx registers. This works +/* + * Store the initial timestamp for booting in mmx registers. This works * because the bootblock isn't being compiled with MMX support so mm0 and - * mm1 will be preserved into romstage. */ + * mm1 will be preserved into romstage. + */ .code32 .global stash_timestamp |