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| author | Subrata Banik <subrata.banik@intel.com> | 2017-03-09 13:56:17 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-10 20:40:01 +0200 |
| commit | e0268d3e1a3ad1511be6c8e512582c7109794510 (patch) | |
| tree | d5beced350f9a4e483b399dd2571283c71cf67ef /src/soc/intel/skylake/bootblock/uart.c | |
| parent | 8e84723e02537229e079dcdb0795d2903eb1603d (diff) | |
| download | coreboot-e0268d3e1a3ad1511be6c8e512582c7109794510.tar.xz | |
soc/intel/skylake: Use RTC common code
This patch uses common RTC library to enable
upper 128 byte bank of RTC RAM.
Change-Id: Ibcbaf5061e96a67815116a9f7a03be515997be6d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18701
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/skylake/bootblock/uart.c')
0 files changed, 0 insertions, 0 deletions