diff options
author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2017-04-26 21:06:35 +0530 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-05-18 06:07:15 +0200 |
commit | ae6a4b6d3ca60fc697103cbdaaf5df84502f554e (patch) | |
tree | 60053ac5506eb928c49bdd958f2648972a6c52ac /src/soc/intel/skylake/bootblock | |
parent | 36b09b8a6c3367dded5c3f0c6a1dc1d16d9a1335 (diff) | |
download | coreboot-ae6a4b6d3ca60fc697103cbdaaf5df84502f554e.tar.xz |
intel/common/block/i2c: Add common block for I2C and use the same in SoCs
In the intel/common/block
* Move I2C common code from intel/common to intel/common/block.
* Split the code into common, early init and post mem init stages and put it
in lpss_i2c.c, i2c_early.c and i2c.c respectively.
* Declare functions for getting platform specific i2c bus config and
mapping bus to devfn and vice versa, that have to be implemented by SoC.
In skylake/apollolake
* Stop using code from soc/intel/common/lpss_i2c.c.
* Remove early i2c initialization code from bootblock.
* Refactor i2c.c file to implement SoC specific methods
required by the I2C IP block.
Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/19468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/bootblock')
-rw-r--r-- | src/soc/intel/skylake/bootblock/bootblock.c | 3 | ||||
-rw-r--r-- | src/soc/intel/skylake/bootblock/i2c.c | 91 |
2 files changed, 2 insertions, 92 deletions
diff --git a/src/soc/intel/skylake/bootblock/bootblock.c b/src/soc/intel/skylake/bootblock/bootblock.c index f386f96360..cbe3dd2fdc 100644 --- a/src/soc/intel/skylake/bootblock/bootblock.c +++ b/src/soc/intel/skylake/bootblock/bootblock.c @@ -15,6 +15,7 @@ #include <bootblock_common.h> #include <intelblocks/gspi.h> +#include <intelblocks/lpss_i2c.h> #include <soc/bootblock.h> asmlinkage void bootblock_c_entry(uint64_t base_timestamp) @@ -48,6 +49,6 @@ void bootblock_soc_init(void) report_platform_info(); set_max_freq(); pch_early_init(); - i2c_early_init(); + gspi_early_bar_init(); } diff --git a/src/soc/intel/skylake/bootblock/i2c.c b/src/soc/intel/skylake/bootblock/i2c.c deleted file mode 100644 index f8859a4607..0000000000 --- a/src/soc/intel/skylake/bootblock/i2c.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/io.h> -#include <commonlib/helpers.h> -#include <device/device.h> -#include <device/i2c.h> -#include <device/pci_def.h> -#include <intelblocks/lpss.h> -#include <soc/intel/common/lpss_i2c.h> -#include <soc/iomap.h> -#include <soc/pci_devs.h> -#include <soc/bootblock.h> -#include "chip.h" - -uintptr_t lpss_i2c_base_address(unsigned int bus) -{ - int devfn; - pci_devfn_t dev; - - /* Find device+function for this controller */ - devfn = i2c_bus_to_devfn(bus); - if (devfn < 0) - return 0; - - /* Form a PCI address for this device */ - dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); - - /* Read the first base address for this device */ - return ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), 16); -} - -static void i2c_early_init_bus(unsigned int bus) -{ - DEVTREE_CONST struct soc_intel_skylake_config *config; - DEVTREE_CONST struct device *tree_dev; - pci_devfn_t dev; - int devfn; - uintptr_t base; - - /* Find the PCI device for this bus controller */ - devfn = i2c_bus_to_devfn(bus); - if (devfn < 0) - return; - - /* Look up the controller device in the devicetree */ - dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); - tree_dev = dev_find_slot(0, devfn); - if (!tree_dev || !tree_dev->enabled) - return; - - /* Skip if not enabled for early init */ - config = tree_dev->chip_info; - if (!config) - return; - if (!config->i2c[bus].early_init) - return; - - /* Prepare early base address for access before memory */ - base = EARLY_I2C_BASE(bus); - pci_write_config32(dev, PCI_BASE_ADDRESS_0, base); - pci_write_config32(dev, PCI_COMMAND, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - - /* Take device out of reset */ - lpss_reset_release(base); - - /* Initialize the controller */ - lpss_i2c_init(bus, &config->i2c[bus]); -} - -void i2c_early_init(void) -{ - int bus; - - /* Initialize I2C controllers that are enabled in devicetree */ - for (bus = 0; bus < SKYLAKE_I2C_DEV_MAX; bus++) - i2c_early_init_bus(bus); -} |