diff options
author | Subrata Banik <subrata.banik@intel.com> | 2017-12-06 19:10:15 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-08 02:43:27 +0000 |
commit | df5ae9ce641dadde0c6a94a382e06aacab17144c (patch) | |
tree | 79e3685d9c856caab4df48ab38650824f94ca9ad /src/soc/intel/skylake/bootblock | |
parent | 3c838c73992d0fe920fe9b5dbee912d83b6c2d7f (diff) | |
download | coreboot-df5ae9ce641dadde0c6a94a382e06aacab17144c.tar.xz |
soc/intel/skylake: Clean up bootblock/report_platform.c
This patch ensures that all required information for
pch/mch/igd deviceid and revision available in single
stage and make use of local references.
TEST=Build and boot soraka/eve
Change-Id: I6f7f219536831210750a486ee3b3308d6f285451
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22756
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/bootblock')
-rw-r--r-- | src/soc/intel/skylake/bootblock/report_platform.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 69484fbb8e..9be2e40575 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -96,6 +96,16 @@ static struct { { PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, "Kabylake HALO GT2" }, }; +static uint8_t get_dev_revision(device_t dev) +{ + return pci_read_config8(dev, PCI_REVISION_ID); +} + +static uint16_t get_dev_id(device_t dev) +{ + return pci_read_config16(dev, PCI_DEVICE_ID); +} + static void report_cpu_info(void) { struct cpuid_result cpuidr; @@ -153,8 +163,9 @@ static void report_cpu_info(void) static void report_mch_info(void) { int i; - u16 mchid = pci_read_config16(SA_DEV_ROOT, PCI_DEVICE_ID); - u8 mch_revision = pci_read_config8(SA_DEV_ROOT, PCI_REVISION_ID); + device_t dev = SA_DEV_ROOT; + uint16_t mchid = get_dev_id(dev); + uint8_t mch_revision = get_dev_revision(dev); const char *mch_type = "Unknown"; for (i = 0; i < ARRAY_SIZE(mch_table); i++) { @@ -171,7 +182,8 @@ static void report_mch_info(void) static void report_pch_info(void) { int i; - u16 lpcid = pch_type(); + device_t dev = PCH_DEV_LPC; + uint16_t lpcid = get_dev_id(dev); const char *pch_type = "Unknown"; for (i = 0; i < ARRAY_SIZE(pch_table); i++) { @@ -181,13 +193,14 @@ static void report_pch_info(void) } } printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n", - lpcid, pch_revision(), pch_type); + lpcid, get_dev_revision(dev), pch_type); } static void report_igd_info(void) { int i; - u16 igdid = pci_read_config16(SA_DEV_IGD, PCI_DEVICE_ID); + device_t dev = SA_DEV_IGD; + uint16_t igdid = get_dev_id(dev); const char *igd_type = "Unknown"; for (i = 0; i < ARRAY_SIZE(igd_table); i++) { @@ -197,7 +210,7 @@ static void report_igd_info(void) } } printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n", - igdid, pci_read_config8(SA_DEV_IGD, PCI_REVISION_ID), igd_type); + igdid, get_dev_revision(dev), igd_type); } void report_platform_info(void) |