diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2018-03-26 02:24:18 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-03-28 22:52:38 +0000 |
| commit | f5116952bb77ac361ad541dea00d9df28067219e (patch) | |
| tree | 16ef5146141c8cd340d6f67605234870f36c89d6 /src/soc/intel/skylake/chip.c | |
| parent | 8b76605a4af9b45894c39cd7b9c480bd96f523cd (diff) | |
| download | coreboot-f5116952bb77ac361ad541dea00d9df28067219e.tar.xz | |
soc/intel/skylake: Limit xDCI feature when VBOOT is enabled
Use the common xDCI function to check if the controller is allowed
in the current mode before enabling it. Otherwise, disable the
PCI device if it has been enabled in devicetree.
To make the SOC behavior consistent the XdciEnable config option
is removed in favor of direct control by devicetree.cb and the
mainboards that had defined it were adjusted accordingly.
This was tested on an Eve board with xDCI enabled in devicetree.cb
to ensure the xDCI device is enabled in developer mode and disabled
in normal mode.
Change-Id: Ic3c84beac87452f17490de32082030880834501d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/25365
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index f60c08d97c..0c1dfa65e5 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -20,6 +20,7 @@ #include <device/device.h> #include <device/pci.h> #include <fsp/util.h> +#include <intelblocks/xdci.h> #include <soc/acpi.h> #include <soc/interrupt.h> #include <soc/irq.h> @@ -78,7 +79,7 @@ struct chip_operations soc_intel_skylake_ops = { /* UPD parameters to be initialized before SiliconInit */ void soc_silicon_init_params(SILICON_INIT_UPD *params) { - const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC); + struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC); const struct soc_intel_skylake_config *config = dev->chip_info; int i; @@ -140,7 +141,6 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) params->EnableAzalia = config->EnableAzalia; params->IoBufferOwnership = config->IoBufferOwnership; params->DspEnable = config->DspEnable; - params->XdciEnable = config->XdciEnable; params->Device4Enable = config->Device4Enable; params->EnableSata = config->EnableSata; params->SataMode = config->SataMode; @@ -196,6 +196,12 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) dev = dev_find_slot(0, PCH_DEVFN_SPI); params->ShowSpiController = dev->enabled; + /* Enable xDCI controller if enabled in devicetree and allowed */ + dev = dev_find_slot(0, PCH_DEVFN_USBOTG); + if (!xdci_can_enable()) + dev->enabled = 0; + params->XdciEnable = dev->enabled; + params->SendVrMbxCmd = config->SendVrMbxCmd; /* Acoustic Noise Mitigation */ |