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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-25 11:27:49 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-26 20:54:32 +0000 |
commit | a634dab1a66d47023a16eaa1ec0a6f0eec688ef0 (patch) | |
tree | 479b6bc5213f3d7477e03a97170de004791917f9 /src/soc/intel/skylake/chip.h | |
parent | d8f44360054b6f63d4cf76be179c4d1193e456ae (diff) | |
download | coreboot-a634dab1a66d47023a16eaa1ec0a6f0eec688ef0.tar.xz |
skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values.
Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43851
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/chip.h')
-rw-r--r-- | src/soc/intel/skylake/chip.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 92cd1bad85..054584051a 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -49,19 +49,6 @@ struct soc_intel_skylake_config { GPU_BACKLIGHT_POLARITY_LOW, } gpu_pch_backlight_polarity; - /* - * Interrupt Routing configuration - * If bit7 is 1, the interrupt is disabled. - */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - /* Gpio group routed to each dword of the GPE0 block. Values are * of the form GPP_[A:G] or GPD. */ uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */ |