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authorSubrata Banik <subrata.banik@intel.com>2017-11-29 16:17:13 +0530
committerSubrata Banik <subrata.banik@intel.com>2017-11-30 16:27:12 +0000
commit771d611f9ea6aa9b6dbf0ea0fffa5fb48e059351 (patch)
tree2571040f7190ecd741f9d8060620e722b83a4797 /src/soc/intel/skylake/chip.h
parent94dc50e81092cc788a861ee17905b58e4dd17242 (diff)
downloadcoreboot-771d611f9ea6aa9b6dbf0ea0fffa5fb48e059351.tar.xz
soc/intel/skylake: Set low maximum temperature threshold for Thermal Device
PMC logic shuts down the thermal sensor when CPU is in a C-state and DTS Temp <= Low Temp Threshold in case Dynamic Thermal Shutdown in S0ix is enabled. BUG=b:69110373 BRANCH=none TEST=Ensure Thermal Device(B0: D20: F2) TSPM offset 0x1c[LTT (8:0)] value is 0xFA. Change-Id: I94d09a28bf1ea07a53cfa04c54752358bafca610 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22419 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/chip.h')
-rw-r--r--src/soc/intel/skylake/chip.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 2c282bc17f..e539019ca0 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -527,6 +527,9 @@ struct soc_intel_skylake_config {
* 2 - VR mailbox command sent for IA/GT/SA rails.
*/
u8 IslVrCmd;
+
+ /* PCH Trip Temperature */
+ u8 pch_trip_temp;
};
typedef struct soc_intel_skylake_config config_t;