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author | Michael Niewöhner <foss@mniewoehner.de> | 2019-09-01 13:53:09 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-15 20:56:24 +0000 |
commit | a1ef94e822a0a2d1093e62d13ceb6dbeb19b22a1 (patch) | |
tree | 7defef16f2a0645c7778527b6a9ec13e2fb1b2d8 /src/soc/intel/skylake/chip.h | |
parent | 5ea2e405dad22930db8f5e8dcf1a1fe383284919 (diff) | |
download | coreboot-a1ef94e822a0a2d1093e62d13ceb6dbeb19b22a1.tar.xz |
soc/intel/skylake: add some FSP SATA params
This adds SATA parameters for SpinUp, HotPlug and TestMode to the
Skylake FSP 2.0 interface.
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I7ba67879b78c2cb0fd0b0ce832140b213edd5884
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35186
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/chip.h')
-rw-r--r-- | src/soc/intel/skylake/chip.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 1313dc15b9..fee14d8d7e 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -200,6 +200,8 @@ struct soc_intel_skylake_config { u8 SataSalpSupport; u8 SataPortsEnable[8]; u8 SataPortsDevSlp[8]; + u8 SataPortsSpinUp[8]; + u8 SataPortsHotPlug[8]; u8 SataSpeedLimit; /* Audio related */ @@ -587,6 +589,9 @@ struct soc_intel_skylake_config { /* Enable/Disable Sata power optimization */ u8 SataPwrOptEnable; + + /* Enable/Disable Sata test mode */ + u8 SataTestMode; }; typedef struct soc_intel_skylake_config config_t; |