diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-12-14 18:18:34 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-22 01:44:18 +0000 |
| commit | ece173cc6fd347fdf121d1ad4518be50fb472071 (patch) | |
| tree | 07f229c5043727afd39e75782f46cef6a5b2585e /src/soc/intel/skylake/cpu.c | |
| parent | 1a274f406cd7fc484f67d5d8c8dba5b66504731e (diff) | |
| download | coreboot-ece173cc6fd347fdf121d1ad4518be50fb472071.tar.xz | |
soc/intel/skylake: Make use of common SMM code for SKL
This patch ensures skylake soc is using common SMM code
from intel common block.
TEST=Build and boot soraka/eve
Change-Id: I8163dc7e18bb417e8c18a12628988959c128b3df
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/22826
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/cpu.c')
| -rw-r--r-- | src/soc/intel/skylake/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index ca844df07c..291a40da3e 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -38,6 +38,7 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/mp_init.h> #include <intelblocks/sgx.h> +#include <intelblocks/smm.h> #include <pc80/mc146818rtc.h> #include <soc/cpu.h> #include <soc/msr.h> @@ -436,7 +437,7 @@ static void post_mp_init(void) * Now that all APs have been relocated as well as the BSP let SMIs * start flowing. */ - southbridge_smm_enable_smi(); + smm_southbridge_enable(GBL_EN); /* Lock down the SMRAM space. */ #if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) |