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authorPratik Prajapati <pratikkumar.v.prajapati@intel.com>2017-08-14 13:47:03 -0700
committerAaron Durbin <adurbin@chromium.org>2017-08-21 16:32:18 +0000
commit57f8386a2bfa2ca794b687cfc7846dab690fd438 (patch)
tree5bdafd9a02c7f49e85d7b235120d2a24fb0dbb5c /src/soc/intel/skylake/cpu.c
parent226065834b046bdeba43b71e63ec896c9adfeb0b (diff)
downloadcoreboot-57f8386a2bfa2ca794b687cfc7846dab690fd438.tar.xz
intel/common/sgx: Use intel_mp_current_microcode() to get microcode pointer
Get microcode patch pointer from intel_mp_current_microcode() api of mp_init and change sgx_configure function signature to drop microcode_patch param. Change-Id: I9196c30ec7ea52d7184a96b33835def197e2c799 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21009 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/cpu.c')
-rw-r--r--src/soc/intel/skylake/cpu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 1a081915a2..fe9c00841d 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -438,7 +438,7 @@ void soc_core_init(device_t cpu, const void *microcode)
enable_turbo();
/* Configure SGX */
- sgx_configure(microcode);
+ sgx_configure();
}
static int adjust_apic_id(int index, int apic_id)
@@ -505,7 +505,7 @@ void soc_init_cpus(struct bus *cpu_bus, const void *microcode)
* here to get SGX enabled on BSP. This behavior needs to root-caused
* and we shall not have this redundant call.
*/
- sgx_configure(microcode);
+ sgx_configure();
}
int soc_skip_ucode_update(u32 current_patch_id, u32 new_patch_id)