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authorRavi Sarawadi <ravishankar.sarawadi@intel.com>2017-09-28 17:06:01 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-03 20:23:21 +0000
commit1483d1fcda092283c303fd1d4f4aeca75dcd0bf1 (patch)
tree8d7fd3948634e5a8b46aaa2655a759c00843ff9c /src/soc/intel/skylake/finalize.c
parenta9b5a393955d2731eb20e3312b95859a55d6230d (diff)
downloadcoreboot-1483d1fcda092283c303fd1d4f4aeca75dcd0bf1.tar.xz
soc/intel/skylake: Enable common LPC IP
Enable Skylake to use the new common LPC code. This will help to reduce code duplication and streamline code bring up. Change-Id: I042e459fb7c07f024a7f6a5fe7da13eb5f0dd688 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Reviewed-on: https://review.coreboot.org/20120 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/finalize.c')
-rw-r--r--src/soc/intel/skylake/finalize.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 770cc1bf77..bcaa283598 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -21,10 +21,10 @@
#include <console/post_codes.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
+#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcr.h>
#include <reg_script.h>
#include <spi-generic.h>
-#include <soc/lpc.h>
#include <soc/me.h>
#include <soc/p2sb.h>
#include <soc/pci_devs.h>