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author | Furquan Shaikh <furquan@chromium.org> | 2016-12-01 07:12:32 -0800 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2016-12-05 03:29:04 +0100 |
commit | 94f8699d447ef94df339d318b836b664273e89ff (patch) | |
tree | 17223ccd5906a8087251beabc943786cade37ee4 /src/soc/intel/skylake/flash_controller.c | |
parent | 36b81af9e8ecea2bf58aae9a421720ed10f61b82 (diff) | |
download | coreboot-94f8699d447ef94df339d318b836b664273e89ff.tar.xz |
spi: Define and use spi_ctrlr structure
1. Define a new structure spi_ctrlr that allows platforms to define
callbacks for spi operations (claim bus, release bus, transfer).
2. Add a new member (pointer to spi_ctrlr structure) in spi_slave
structure which will be initialized by call to spi_setup_slave.
3. Define spi_claim_bus, spi_release_bus and spi_xfer in spi-generic.c
which will make appropriate calls to ctrlr functions.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: Icb2326e3aab1e8f4bef53f553f82b3836358c55e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17684
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/flash_controller.c')
-rw-r--r-- | src/soc/intel/skylake/flash_controller.c | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index 734d9d3532..e0ac93da03 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -151,13 +151,6 @@ static size_t spi_get_flash_size(pch_spi_regs *spi_bar) return size; } -int spi_xfer(const struct spi_slave *slave, const void *dout, - size_t bytesout, void *din, size_t bytesin) -{ - /* TODO: Define xfer for hardware sequencing. */ - return -1; -} - void spi_init(void) { uint8_t bios_cntl; @@ -170,17 +163,6 @@ void spi_init(void) pci_write_config_byte(dev, SPIBAR_BIOS_CNTL, bios_cntl); } -int spi_claim_bus(const struct spi_slave *slave) -{ - /* Handled by PCH automatically. */ - return 0; -} - -void spi_release_bus(const struct spi_slave *slave) -{ - /* Handled by PCH automatically. */ -} - int pch_hwseq_erase(const struct spi_flash *flash, u32 offset, size_t len) { u32 start, end, erase_size; @@ -377,6 +359,7 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) slave->bus = bus; slave->cs = cs; + slave->ctrlr = NULL; return 0; } |