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authorPatrick Rudolph <siro@das-labor.org>2017-06-15 09:22:06 +0200
committerPatrick Rudolph <siro@das-labor.org>2017-07-24 16:48:30 +0000
commitc1055ab07a96927eb738eefe68faa3c19ac060a2 (patch)
tree35ad9bd7d31a870c957bc1b1e822b2d4b79a4f67 /src/soc/intel/skylake/include
parent43be77db3185591a6bd04b36cd0135634816d82d (diff)
downloadcoreboot-c1055ab07a96927eb738eefe68faa3c19ac060a2.tar.xz
soc/intel/skylake: Use common opregion implementation
Enable SOC_INTEL_COMMON_GFX_OPREGION for all FSP versions. Allows to get rid of opregion.c, as it's no longer needed. Change-Id: I39190488e12917a09dbf7ee3947a33940ebc290b Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/20222 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/fsp11/soc/ramstage.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
index a0c8a17bb9..6f9362a4bd 100644
--- a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
@@ -19,7 +19,6 @@
#include <chip.h>
#include <device/device.h>
-#include <fsp/gop.h>
#include <fsp/ramstage.h>
#include <fsp/soc_binding.h>
@@ -31,7 +30,6 @@ void pch_enable_dev(device_t dev);
void soc_init_pre_device(void *chip_info);
void soc_fsp_load(void);
const char *soc_acpi_name(struct device *dev);
-int init_igd_opregion(igd_opregion_t *igd_opregion);
extern struct pci_operations soc_pci_ops;
/* Get igd framebuffer bar */