diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-03-07 14:02:23 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-28 16:38:42 +0200 |
| commit | 03e971cd23e96b9293fc3ecc420f56ad91326cd9 (patch) | |
| tree | 722243549211ec6204f190f1d2c1d825d41aa466 /src/soc/intel/skylake/include | |
| parent | 0637e567e13adab5b204a33fc57a54f437761f3f (diff) | |
| download | coreboot-03e971cd23e96b9293fc3ecc420f56ad91326cd9.tar.xz | |
soc/intel/common/block: Add cache as ram init and teardown code
Create sample model for common car init and teardown programming.
TEST=Booted Reef, KCRD/EVE, GLKRVP with CAR_CQOS, CAR_NEM_ENHANCED
and CAR_NEM configs till post code 0x2a.
Change-Id: Iffd0c3e3ca81a3d283d5f1da115222a222e6b157
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18381
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/car_teardown.S | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/src/soc/intel/skylake/include/soc/car_teardown.S b/src/soc/intel/skylake/include/soc/car_teardown.S deleted file mode 100644 index 315b3c1deb..0000000000 --- a/src/soc/intel/skylake/include/soc/car_teardown.S +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. - * Copyright (C) 2016 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -.equ IA32_PQR_ASSOC, 0x0c8f - - /* Disable MTRR by clearing the IA32_MTRR_DEF_TYPE MSR E flag. */ - movl $MTRR_DEF_TYPE_MSR, %ecx - rdmsr - andl $(~MTRR_DEF_TYPE_EN), %eax - wrmsr - - /* Invalidate Cache */ - invd - - /* - * Disable No-Eviction Mode Run State by clearing - * NO_EVICT_MODE MSR 2E0h bit [1] = 0 - */ - movl $0x000002E0, %ecx - rdmsr - andl $~(0x2), %eax - wrmsr - - /* - * Disable No-Eviction Mode Setup State by clearing - * NO_EVICT_MODE MSR 2E0h bit [0] = 0 - */ - rdmsr - andl $~(0x1), %eax - wrmsr - - /* - * Set IA32_PQR_ASSOC = 0x00 - * This step guarantees that no protected way remain in LLC cache, - * all the ways are open for the evictions. - */ - movl $IA32_PQR_ASSOC, %ecx - movl $0x00, %eax - xorl %edx, %edx - wrmsr |