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authorRizwan Qureshi <rizwan.qureshi@intel.com>2015-11-20 11:46:54 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-01-16 11:58:31 +0100
commit2b1e8b3c3d8ee17124fe98a31ed31815ac03539d (patch)
tree8dfdc69c066cf0f5d5027b4207b30ff3877f61dd /src/soc/intel/skylake/include
parentb6319c1121332551a51a9ef7d88c3e7ed8d0670d (diff)
downloadcoreboot-2b1e8b3c3d8ee17124fe98a31ed31815ac03539d.tar.xz
intel/skylake: Add VrConfig UPD parameters from coreboot
Adding VrConfig UPDs and assign values to those from devicetree BRANCH=none BUG=chrome-os-partner:45387 TEST=Build and booted in kunimitsu CQ-DEPEND=CL:310192 Change-Id: Ifce9dfacabc742b55266c48459c56c69b1f22236 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b34a3cc77afc8795abb64972f8169986c30c2acd Original-Change-Id: Ifa960e718ed77db729f1fc4e2c00c9b305093e04 Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/311317 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12944 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/vr_config.h77
1 files changed, 77 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/vr_config.h b/src/soc/intel/skylake/include/soc/vr_config.h
new file mode 100644
index 0000000000..926ddf1a16
--- /dev/null
+++ b/src/soc/intel/skylake/include/soc/vr_config.h
@@ -0,0 +1,77 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+/* VR Settings for each domain */
+
+#ifndef _SOC_VR_CONFIG_H_
+#define _SOC_VR_CONFIG_H_
+
+struct vr_config {
+
+ /*
+ * The below settings will take effect when this is set to 1
+ * for that domain.
+ */
+ int vr_config_enable;
+
+ /* Power State X current cuttof in 1/4 Amp increments
+ * Range is 0-128A
+ */
+ int psi1threshold;
+ int psi2threshold;
+ int psi3threshold;
+
+ /* Enable power state 3/4 for different domains */
+ int psi3enable;
+ int psi4enable;
+
+ /*
+ * Imon slope correction. Specified in 1/100 increment
+ * values. Range is 0-200. 125 = 1.25
+ */
+ int imon_slope;
+
+ /*
+ * Imon offset correction. Units 1/4, Range 0-255.
+ * Value of 100 = 100/4 = 25 offset.
+ */
+ int imon_offset;
+
+ /* VR Icc Max limit. 0-255A in 1/4 A units. 400 = 100A */
+ int icc_max;
+
+ /* VR Voltage Limit. Range is 0-7999mV */
+ int voltage_limit;
+};
+
+/* VrConfig Settings for 5 domains
+ * 0 = System Agent, 1 = IA Core, 2 = Ring,
+ * 3 = GT unsliced, 4 = GT sliced
+ */
+enum vr_domain{
+ VR_SYSTEM_AGENT,
+ VR_IA_CORE,
+ VR_RING,
+ VR_GT_UNSLICED,
+ VR_GT_SLICED,
+ NUM_VR_DOMAINS
+};
+
+#endif