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author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-16 17:08:03 -0700 |
---|---|---|
committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 02:35:27 +0100 |
commit | f4c4ab9826b521666d5ba887e69a636428ac9eb2 (patch) | |
tree | 2dfe4a3e54deb52916fef93bdf6b2cb6c9090efb /src/soc/intel/skylake/include | |
parent | b439a929392ba54dee43455f6e164b884cb8c308 (diff) | |
download | coreboot-f4c4ab9826b521666d5ba887e69a636428ac9eb2.tar.xz |
soc/intel/skylake: Fix remaining issues detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl:
ERROR: code indent should use tabs where possible
ERROR: Macros with complex values should be enclosed in parentheses
ERROR: "foo * bar" should be "foo *bar"
ERROR: space required before the open parenthesis '('
ERROR: spaces required around that '=' (ctx:VxW)
WARNING: space prohibited between function name and open parenthesis '('
WARNING: storage class should be at the beginning of the declaration
WARNING: char * array declaration might be better as static const
WARNING: please, no space before tabs
WARNING: braces {} are not necessary for single statement blocks
WARNING: else is not generally useful after a break or return
WARNING: static const char * array should probably be static const char * const
TEST=Build for glados
Change-Id: Ic14ca3abd193cfe257504a55ab6b74782b26bf6d
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18868
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r-- | src/soc/intel/skylake/include/soc/gpio.h | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/p2sb.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h index c0e37db91e..ae534cd9ce 100644 --- a/src/soc/intel/skylake/include/soc/gpio.h +++ b/src/soc/intel/skylake/include/soc/gpio.h @@ -97,7 +97,7 @@ void gpio_configure_pads(const struct pad_config *cfgs, size_t num); PAD_FIELD(GPIOTXDIS, txdis)) #define _PAD_CFG_ATTRS(pad_, term_, dw0_, attrs_) \ - { \ + { \ .pad = pad_, \ .attrs = PAD_FIELD(PAD_TERM, term_) | attrs_, \ .dw0 = dw0_, \ diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h index 354679f2a8..36bb62d675 100644 --- a/src/soc/intel/skylake/include/soc/p2sb.h +++ b/src/soc/intel/skylake/include/soc/p2sb.h @@ -20,7 +20,7 @@ #define HPTC_ADDR_ENABLE_BIT (1 << 7) #define PCH_P2SB_EPMASK0 0xB0 -#define PCH_P2SB_EPMASK(mask_number) PCH_P2SB_EPMASK0 + (mask_number * 4) +#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + (mask_number * 4)) #define PCH_P2SB_E0 0xE0 #define PCH_PWRM_ACPI_TMR_CTL 0xFC |